By Eugene Fiume
This down-to-earth creation to computation uses the large array of recommendations on hand within the smooth computing setting. A self-contained advisor for engineers and different clients of computational equipment, it's been effectively followed as a textual content in instructing the following new release of mathematicians and special effects majors.
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Extra resources for An introduction to scientific, symbolic, and graphical computation
In this way, both S/H and gain functions can be implemented within one SC circuit [57,91]. In the configuration shown in Fig. 7b, only one capacitor is used as both sampling capacitor and feedback capacitor. This configuration does not implement the gain function, but it can achieve high speed because the feedback factor (the ratio of the feedback capacitor to the total capacitance at the summing node) can be much larger than that of the previous configuration, operating much closer to the unity gain frequency of the amplifier.
Assuming that the kT/C noise limit establishes the value of the load capacitance, to achieve required SNR large transconductance is required. Accordingly, the aspect ratio necessary for the input differential pair must be fairly large, in the hundred range. Similarly, since with scaling the gate oxide becomes thinner, the specific capacitance Cox increases as the scaling factor. However, since the gate area decreases as the square of the scaling factor, the gate-to-source and gain-to-drain parasitic capacitance lowers as the process is scaled.
Although this operation produces a latency corresponding to the sub-conversion stage before generating a valid output code, the conversion rate is determined by each stage’s conversion time, which is dependent on the reconstruction D/A converter and residue amplifier settling time. The multi-stage pipeline structure combines the advantages of high throughput by flash converters with the low complexity, power dissipation, and input capacitance of sub-ranging/multi-step converters. The advantage of the pipelined A/D converter architecture over the two-step converter is the freedom in the choice of number of bits per stage.
An introduction to scientific, symbolic, and graphical computation by Eugene Fiume